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| SN6B000 Hi-Density LCD Driver with 8-bit Controller GENERAL DESCRIPTIONS SN6B000 is a 8-bit micro controller series with hi-density LCD driver. Combined with one or more SN6BS00 (64-segment drivers), SN6B000 can form one 1024/ 2048/ 4096/ 6144/ 8192 dots LCD system. A dual-tone melody and a voice synthesizer are included in SN6B000. Also, a 7-bit current-type DAC and the PWM circuit are built in SN6B000, so that makes users easily choose a speaker (DA), or a buzzer (PWM) for their applications. SN6B000 only contains 32 COM signals of LCD. All segment signals are provided by SN6BS00. Several different types of LCD applications can be implemented by suitably combining SN6B000 and SN6BS00. SN6B000 not only contains internal mask ROM itself (128K words, MC mode), but also possesses the interface to access external ROM (maximum 512K words, MP mode). A memory chip, SN6B400 consists of 256K-word mask ROM and is available to work with SN6B000 to accomplish the whole micro-processor system. Dots 1024 2048 4096 6144 8192 Configuration 1 SN6B000 + l SN6BS00 1 SN6B000 + l SN6BS00 1 SN6B000 + 2 SN6BS00 1 SN6B000 + 3 SN6BS00 1 SN6B000 + 4 SN6BS00 COM 16 32 32 32 32 SEG 64 64 128 192 256 1 December 20, 2000 SN6B000 Hi-Density LCD Driver with 8-bit Controller FEATURES ROM space: 512K words (=219*16=220*8); Program Space: 256K*16 MC mode:128K words in SN6B000 - MP mode: along with SN6B400 to 256K words - RAM Size: 256 bytes in SN6B000 - 4*256 bytes in SN6BS00 (2*256 bytes LCD RAM, 2*256 bytes normal - RAM) I/O Port : There are Port0 and Port1 (total 16 pins I/O) All ports are I/O-type and P0.7 can be modulated with a carry signal - Each port can be set as "H", "L", floating, and high-resistance "H" - (150K@5V ) Every port can wake up chip when chip is in power-down mode - 60 instructions 8 levels stack buffer supports interrupt and call subroutine System Clock: 2MHz RC oscillator - 2M/ 4M(3.58M) crystal - Low speed clock: Register option, 32768 crystal or RC Three different operation modes can be selected: Normal mode (both High/Low osc. On). - Slow mode (High osc. Off, Low osc. On). - Stop mode (both High and Low osc. Off). - LCD: 1/16 duty (for 1024) or 1/32 duty, frame rate=64 or 128 Hz. A voltage regulator and double voltage circuit is included in SN6BS000 8 interrupt sources : 5 internal interrupts: T0, TC0, TC1, TW, SPEECH (non-maskable). - 3 external interrupts: INTP0.0 ~ INTP0.2 - ISR entry location: Reset: 0000, SPEECH: 0018h, and the others: 0008h - Voice: Built-in voice synthesizer - Sampling rate from 4K to 40Khz - Dual tone melody with 4 octaves - 7-bit DA converter (maximum 3mA) - PWM output for Buzzer - 2 December 20, 2000 SN6B000 Hi-Density LCD Driver with 8-bit Controller PIN ASSIGNMENT SN6B000 Pin Name C0~C31 VLC1, VLC4, VLC5 VLCDR P/C A0~A19 D0~D7 CE1B VO/ BUZ1 BUZ2 OSC/XIN I/O Descriptions Internal Pull-low O Common 0 ~ 31 I LCD Bias I I O I/O O O O LCD Bias Micro-processor/Micro-controller Address Bus for ROM Data Bus for ROM Chip Enable of External ROM. Voice out, 7-bit DA / PWM output PWM output High speed Clock input: CKSEL=L, RC oscillator CKSEL=H, Crystal High Speed clock output High speed clock selection ( 0:2M RC oscillator, 1: Crystal) Low speed clock input Low speed clock output I/O Ports Chip Enable of SN6BS00 0 Chip Enable of SN6BS00 1 Chip Enable of SN6BS00 2 Chip Enable of SN6BS00 3 Data Bus to Slave Driver Address Bus to Slave Driver Read Write signal Frame Synchronous Signal Display Synchronous Signal Alternating signal for LCD Phase 1 synchronous pin. Test Pin Reset Pin Positive power supply Negative power supply XOUT CKSEL LXIN LXOUT P0, P1 XCE_0 XCE_1 XCE_2 XCE_3 XD7~XD0 XA9~XA0 WR FRAME CL M SYNC TEST RESETB VDD GND O I I O I/O O O O O I/O O O O O O O I I I I 3 December 20, 2000 SN6B000 Hi-Density LCD Driver with 8-bit Controller SN6BS00: Pin Name S0~S63 VLCDR, VLC2, VLC3, VLC5 VREG VPS VO1, VO2 XA0~XA9 XD0~XD7 XCE WR FRAME CL M VDD GND I/O Descriptions O Segment 0 ~ 63 I LCD Bias O I I I I/O I I I I I I I Voltage Pumper Voltage Pumper Voltage Pumper Address Bus Data Bus Chip Enable Read Write signal Frame Synchronous Signal Display Synchronous Signal Alternating signal for LCD Positive power supply Negative power supply SN6B400: Pin Name VDD CEB SYNC D7~D0 A18~A0 VSS I/O I I I O I I Function Description Positive power supply Chip Enable. (Active Low) Clock Pin Data Output Address Input Negative power supply. 4 December 20, 2000 SN6B000 Hi-Density LCD Driver with 8-bit Controller ABSOLUTE MAXIMUM RATINGS (All of the voltages referenced to Vss) Supply voltage (Vdd) Input in voltage (Vin) Vss Operating ambient temperature (Topr) Storage ambient temperature (Tstor) Power consumption (Pc) - 0.3V ~ 6.0V - 0.2V ~ Vdd + 0.2V 0C ~ + 70C -30C ~ + 125C 500 mW ELECTRICAL CHARACTERISTICS SN6B000 PARAMETER Operating voltage Operating current SYM. Vdd IddH Vdd = 5.0V, I/O pin unload, normal mode Idds Vdd = 5.0V,I/O pin unload, slow mode Istby Vdd = 5.0V,I/O pin unload, stop mode Reset, TEST pin input voltage Reset, TEST leakage current I/P port input voltage I/P port pull-up resistor I/P port input leakage current Port0,1 output source Current Port0,1 output sink Current LCD supply voltage LCD frame frequency Vo output Current BU1,BU2 Driving Current BU1,BU2 Sinking Current INTP0 trigger pulse width Oscillator frequency Vlcd Flcd Ivo DA output current VBU1/BU2=2.5V IsBU PWM sinking current ability. VBU1/BU2=2.5V Tint01 P0.0 ~ P0.2 Interrupt request pulse width fHxosc Rosc=300K 5 2 MHz 1/fcpu S 60 mA IdBU PWM driving current ability. 64/128 3 60 6.5 4 V Hz mA mA IoL Vop = Vss + 0.5V 2 4 mA IoH Vop = Vdd - 0.5V 1 2 mA ViH ViL Rup Vin = Vss Ilekg Pull-up resistor disable, Vin = Vdd 0.8Vdd 150 0.2Vss 1 K uA V ViH ViL ILekg Vin = Vdd 0.7Vdd 0.3Vss 1 uA V 1 uA 15 uA DESCRIPTION MIN. 3.9 TYP. 1 MAX. UNIT 5.1 V mA December 20, 2000 SN6B000 Hi-Density LCD Driver with 8-bit Controller SN6BS00 (All of voltages referenced to Vss, Vdd = 5.0V, SN6B000@3.58MHz, ambient temperature is 25C unless otherwise note.) PARAMETER Operating voltage Operating current Standby Current SYM. Vdd DESCRIPTION MIN. TYP. MAX. UNIT 3.9 3 5.1 1 V mA uA IddH LCD pin unload, Voltage-doubler ON Istby LCD pin unload, Voltage-doubler OFF, No Data Access from SN6B000. Output Voltage of VREG VOREG VDD=3.9V VDD=4.5V VDD=5.1V - 5.4 5.9 6.2 - V V V SN6B400 (All of voltages referenced to Vss, Vdd = 5.0V, SN6B000@3.58MHz, ambient temperature is 25C unless otherwise note.) PARAMETER Operating voltage Operating current Standby Current Access time SYM. Vdd IddH Istby CEB=5V DESCRIPTION MIN. TYP. MAX. UNIT 3.6 400 5.1 1 300 V uA uA nS Tac Loading=10pf, VDD = 3.6V~5V 6 December 20, 2000 SN6B000 Hi-Density LCD Driver with 8-bit Controller APPLICATION CIRCUIT MC mode with 2048-dot (64 seg X 32 com, 1/7 bias) LCD - - - Clock: RC type (CPU frequency: 2MHZ) No low speed clock Speaker voice output 7 December 20, 2000 SN6B000 Hi-Density LCD Driver with 8-bit Controller MP mode with SN6B400 and 2048-dot (64seg X 32com, 1/7 bias) LCD - - - Clock: 3.58MHZ crystal (CPU frequency: 3.58MHZ) 32768 low speed clock Buzzer voice output 8 December 20, 2000 SN6B000 Hi-Density LCD Driver with 8-bit Controller MP mode with SN6B400 and 4096-dot (128seg X 32com, 1/7 bias) LCD - Clock: 3.58MHZ (CPU frequency: 3.58MHZ) - 32768 low speed clock - Speaker voice output 9 December 20, 2000 SN6B000 Hi-Density LCD Driver with 8-bit Controller BONDING PAD Note : The substrate MUST be connected to Vss in PCB layout. SN6B000 10 December 20, 2000 SN6B000 Hi-Density LCD Driver with 8-bit Controller Note : The substrate MUST be connected to Vss in PCB layout. SN6BS00 11 December 20, 2000 SN6B000 Hi-Density LCD Driver with 8-bit Controller SN6B400 Note : The substrate MUST be connected to Vss in PCB layout. 12 December 20, 2000 SN6B000 Hi-Density LCD Driver with 8-bit Controller DISCLAIMER The information appearing in SONiX web pages ("this publication") is believed to be accurate. However, this publication could contain technical inaccuracies or typographical errors. The reader should not assume that this publication is error-free or that it will be suitable for any particular purpose. SONiX makes no warranty, express, statutory implied or by description in this publication or other documents which are referenced by or linked to this publication. In no event shall SONiX be liable for any special, incidental, indirect or consequential damages of any kind, or any damages whatsoever, including, without limitation, those resulting from loss of use, data or profits, whether or not advised of the possibility of damage, and on any theory of liability, arising out of or in connection with the use or performance of this publication or other documents which are referenced by or linked to this publication. This publication was developed for products offered in Taiwan. SONiX may not offer the products discussed in this document in other countries. Information is subject to change without notice. Please contact SONiX or its local representative for information on offerings available. Integrated circuits sold by SONiX are covered by the warranty and patent indemnification provisions stipulated in the terms of sale only. The application circuits illustrated in this document are for reference purposes only. SONIX DISCLAIMS ALL WARRANTIES, INCLUDING THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. SONIX reserves the right to halt production or alter the specifications and prices, and discontinue marketing the Products listed at any time without notice. Accordingly, the reader is cautioned to verify that the data sheets and other information in this publication are current before placing orders. Products described herein are intended for use in normal commercial applications. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equipment, are specifically not recommended without additional processing by SONIX for such application. 13 December 20, 2000 |
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